A zero-IF 60GHz transceiver in 65nm CMOS with ≫ 3.5Gb/s links
نویسندگان
چکیده
This paper presents a 1.2V 60GHz zero-IF transceiver fabricated in a 65nm CMOS process with a digital back-end. The chip includes a receiver with 14.7dB gain, a low 5.6dB noise figure, a 60GHz LO distribution tree, a 64GHz static frequency divider, and a direct BPSK modulator operating over the 55-65GHz band at data rates exceeding 3.5Gb/s. The chip consumes 374mW (232mW) from 1.2V (1.0V) and occupies 1.28x0.81mm. The transceiver was characterized over temperature up to 85C and for power supplies down to 1V. A manufacturability study of 60GHz radio circuits is presented with measurements of transistors, the low-noise amplifier, and the receiver on typical and fast process splits. The transceiver performance is demonstrated using a 3.5Gb/s 2-meter wireline/wireless transmit-receive link over the 55-64 GHz range.
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